Driver & firmware fundamentals

PCIe capability, negotiated link and topology

Read endpoint and bridge observations without treating marketing generation or a downgraded link as a unique cause.

Inspect the complete path

An endpoint connects through root ports and sometimes PCIe switches. Each link has its own capability and negotiated state. Compare the relevant endpoint and upstream bridges, not just the GPU product label. Board lane sharing and slot wiring need the specific board manual; a generic PCI bridge profile cannot establish them.

lspci -t
lspci -vv -s BDF

State depends on the observation context

A lower reported speed can reflect a power state or a real negotiation limit. Record whether the observation is idle or during the relevant load. Repeat a minimal safe observation rather than immediately applying global power-management settings. Some extended PCI fields require privileges; avoid indiscriminate configuration-space dumps.

AER is classified evidence

Corrected, nonfatal and fatal PCIe errors have different implications. A requester and timestamp help map the path, but do not independently prove a defective card or cable. Preserve logs and compare one documented change at a time, with a working boot entry. The Explorer makes no automatic ASPM, IOMMU or reset changes.

References

Source review records a checked implementation or document, not a reproduced hardware test. Version-specific tables do not establish a minimum kernel or guaranteed operation.

Use the local identification tool